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Espressif Systems /ESP32-S2 /RTC_CNTL /REG

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Interpret as REG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DIG_REG_DBIAS_SLP 0DIG_REG_DBIAS_WAK 0SCK_DCAP0DBIAS_SLP 0DBIAS_WAK 0 (DBOOST_FORCE_PD)DBOOST_FORCE_PD 0 (DBOOST_FORCE_PU)DBOOST_FORCE_PU 0 (REGULATOR_FORCE_PD)REGULATOR_FORCE_PD 0 (REGULATOR_FORCE_PU)REGULATOR_FORCE_PU

Description

RTC/DIG regulator configuration register

Fields

DIG_REG_DBIAS_SLP

Configures the regulation factor for the digital system voltage regulator when the CPU is in sleep status.
DIG_REG_DBIAS_WAK

Configures the regulation factor for the digital system voltage regulator when the CPU is in active status.
SCK_DCAP

Configures the frequency of the RTC clocks.
DBIAS_SLP

Configures the regulation factor for the low-power voltage regulator when the CPU is in sleep status.
DBIAS_WAK

Configures the regulation factor for the low-power voltage regulator when the CPU is in active status.
DBOOST_FORCE_PD

RTC_DBOOST force power down
DBOOST_FORCE_PU

RTC_DBOOST force power up
REGULATOR_FORCE_PD

Set this bit to FPD the RTC_REG, which means decreasing its voltage to 0.8 V or lower.
REGULATOR_FORCE_PU

Set this bit to FPU the RTC_REG.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/espressif/svd